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Ny Serdes-chip er optimeret til industriel video

National Semiconductor’s Channel Link III SerDes er den første, der integrerer zero-latency kontrol til brug i industrielle videoapplikationer (in english).

National Semiconductor Corp. har introduced its Channel Link III serializer and deserializer (SerDes) family featuring the industry’s first integrated zero-latency, bidirectional control channel.

The SerDes deliver clock, high-speed data and a low-speed, bidirectional I2C control bus over a single twisted wire pair. This significantly reduces interconnect size, weight and cost by up to 50 percent for industrial video, imaging and display applications. 

The Channel Link III family includes two chipsets: the DS92LX2121 serializer and DS92LX2122 deserializer, which drive 18-bit color display applications or data links up to 1050 Mbps; and the DS92LX1621 serializer and DS92LX1622 deserializer, which drive 16-bit data up to 800 Mbps and are ideal for space-constrained camera systems. Both chipsets use a low-voltage CMOS (LVCMOS) parallel interface and operate from 10 MHz to 50 MHz.

National also expanded its Channel Link II family with two new chipsets for applications that do not require a bidirectional control channel: the DS92LV2421 serializer and DS92LV2422 deserializer, which use a LVCMOS parallel interface; and the DS92LV0421 serializer and DS92LV0422 deserializer, which use a low-voltage differential signaling (LVDS) interface.

The DS92LV0421/22 also provides an easy upgrade path from Channel Link SerDes through the LVDS bridge feature. Both chipsets embed the clock with high-speed data, drive 24-bit data at transmission rates up to 1.8 Gbps, and operate from 10 MHz to 75 MHz.

Having a choice in SerDes I/O interfaces and a wide operating range allows designers to select from a broad array of video sources up through high-definition (HD) resolutions. Both the Channel Link III and Channel Link II SerDes automatically lock to incoming raw data from an ASIC or FPGA without an external reference clock or training patterns, providing easy 'plug-and-go' operation.  

Both Channel Link III and Channel Link II chipsets feature integrated signal conditioning functions, which enable them to drive high-speed signals up to two times farther to remote displays than other SerDes. They also feature spread-spectrum clocking to mitigate electromagnetic interference (EMI) in harsh industrial environments.

The SerDes tolerate electrostatic discharge (ESD) of greater than 8 kV human body model (HBM) and comply with the ISO 10605 ESD rating. Both SerDes families provide -40 degrees C and 85 degrees C operation and include built-in self test (BIST) diagnostics to validate link integrity.

Unlike FPGAs with integrated SerDes, National’s Channel Link III and Channel Link II SerDes do not require a reference clock, external signal conditioning components, low-noise power supply, ESD protection circuits or dedicated PCB power supply planes. This simplifies system design by eliminating external components and their associated cost. Additionally, the Channel Link III SerDes’ integrated bidirectional control channel eliminates the extra wire pair required by FPGAs.

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