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Startskud for stort europæisk projekt indenfor mikroelektronik

Det hidtil største europæiske forskningsprojekt indenfor opbygning af højt integrerede 'system-in-package' løsninger er netop startet med Infineon som projektleder (in english).

The biggest research project in Europe to research and develop highly integrated electronic system-in-package solutions has just been launched. System-in-package is a concept, where several different chips are embedded side by side or stacked above one another in one chip package.

Working together on the ESiP project (Efficient Silicon Multi-Chip System-in-Package Integration) are 40 microelectronics companies and research institutions from a total of nine European countries, with the aim of making miniaturized complex microelectronics systems more reliable and testable.  Under the leadership of Infineon Technologies AG the research project will run until April 2013. 

The results of the ESiP project should help put Europe in a leading position in the development and manufacture of miniaturized microelectronics systems. In the future, several chips with different production techniques and structure widths will be integrated in a standard chip package for more and more applications.

These might be, for example, a special 45-nm processor, a high-frequency 90-nm transmit/receive chip, sensors and passive components such as miniaturized capacitors or special filters. The aim of ESiP is to investigate the reliability of new production processes and materials required to build a System in Package (SiP). The project will also involve developing new methods for error analysis and testing. The results of the ESiP project will in future be used, for example, in electric vehicles, medical equipment and communication technology devices.

SiP technologies are understood to be base technologies for future microelectronics systems which make complete technical solutions possible such as microcameras in the smallest of spaces in one SiP package. This entails, for example, stacking different types of chips (3D integration), combining them intelligently and integrating them in a functional chip package. Infineon's contribution to the ESiP project is to further develop system integration solutions comprising several microchips and improve them in terms of failure analysis, reliability and testability.

Research partners of ESiP

Among the German research partners, alongside the companies Infineon Technologies AG and Siemens AG, are the medium-sized companies Team Nanotec GmbH, Feinmetall GmbH, Cascade Microtech Dresden GmbH, InfraTec GmbH, PVA TePla Analytical Systems GmbH and various institutes attached to the Fraunhofer-Gesellschaft.

The total budget for ESiP amounts to around Euro 35 million across Europe, with half of the total being financed over three years by the 40 project partners. Two thirds of the other half will be provided by the national funding organizations in Austria, Belgium, Finland, France, Germany, Great Britain, Italy, the Netherlands, and Norway, and a third by the European Union (European Nanoelectronics Initiative Advisory Council ENIAC and the European Regional Development Fund).

In addition to the Free State of Saxony in Germany, the German Ministry of Education and Research (BMBF) is also sponsoring the ESiP project as part of the government’s high-tech strategy and Information and Communications Technology 2020 program (IKT 2020) with funding of around Euro 3.1 million. The BMBF is the biggest sponsor of the participating European state authorities. The aim of the BMBF is to strengthen Germany as a microelectronics location through promoting strategic collaboration at European level.

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